View MAX1B193EVKIT_486459.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

19-2958; Rev 0; 7/03
MAX1193 Evaluation Kit
General Description
The MAX1193 evaluation kit (EV kit) is a fully assembled and tested circuit board that contains all the components necessary to evaluate the performance of the MAX1191/ MAX1192/MAX1193 dual, 8-bit analog-to-digital converters (ADCs). The MAX1191/MAX1192/MAX1193 accept AC- or DC-coupled, differential, or single-ended analog inputs. The digital output produced by the ADC can be easily captured with a user-provided high-speed logic analyzer or data acquisition system. The EV kit operates from a 3.3V analog and a 2.5V digital power supply. The EV kit includes circuitry that generates a clock signal from an AC sine wave signal provided by the user. The EV kit comes with the MAX1193 installed. Order free samples of the pin-compatible MAX1191 or MAX1192 to evaluate these parts. o Ultra-Low-Power Operation o Single-Ended or Fully Differential Input Signal Configuration o AC- or DC-Coupled Input Configuration o Configurable Reference Voltage o On-Board Clock-Shaping Circuit o Fully Assembled and Tested o Also Evaluates MAX1191 and MAX1192 (IC Replacement Required)
Features
o Up to 45Msps Sampling Rate (MAX1193)
Evaluates: MAX1191/MAX1192/MAX1193
Selector Guide
PART MAX1191ETI MAX1192ETI MAX1193ETI SPEED (Msps) 7.5 22 45 PART MAX1193EVKIT
Ordering Information
TEMP RANGE 0C to +70C IC PACKAGE 28-Thin QFN
Note: To evaluate the MAX1191/MAX1192, request a free sample with the MAX1193 EV kit.
Component List
DESIGNATION C1-C6, C9, C19, C21-C27, C29, C31, C33, C35, C37, C39, C41 C7, C12, C14, C20 QTY DESCRIPTION 0.1F 10%, 16V X7R ceramic capacitors (0603) TDK C1608X7R1C104K 1000pF 10%, 50V X7R ceramic capacitors (0603) TDK C1608X7R1H102K 0.33F 10%, 6.3V X5R ceramic capacitors (0603) TDK C1608X5R0J334K 22pF 5%, 50V C0G ceramic capacitors (0603) TDK C1608C0G1H220J 2.2F 10%, 10V tantalum capacitors (A case) AVX TAJA225K010R 10F 20%, 10V tantalum capacitors (B case) AVX TAJB106M010R Header 2 x 10 DESIGNATION JU1-JU4, JU7, JU8, JU11 JU5, JU6, JU9, JU10 R1-R4, R18, R31-R40 R5, R6, R41-R44 R7-R10, R17 R11-R14 R15, R20 R16 R19 R21-R30 R45, R46 T1, T2 U1 U2 QTY 7 4 15 0 5 4 2 1 1 10 0 2 1 1 DESCRIPTION 3-pin headers 2-pin headers 49.9 1% resistors (0603) Not installed, resistors (0603) 2k 1% resistors (0603) 24.9 1% resistors (0603) 4.02k 1% resistors (0603) 5k 1/4in potentiometer, 12 turn 6.04k 1% resistor (0603) 100 1% resistors (0603) Not installed, resistors (0402) RF transformers Mini-Circuits TT1-6-KK81 MAX1193ETI (28-pin TQFN) Dual CMOS differential line receiver (8-pin SO), MAX9113ESA
22
4
C8, C13, C15
3
C10, C11, C16, C17
4
C18, C36, C38, C40, C42
5
C28, C30, C32, C34 J1
4 1
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
MAX1193 Evaluation Kit Evaluates: MAX1191/MAX1192/MAX1193
Component List (continued)
DESIGNATION QTY DESCRIPTION Buffer/drivers tri-state output (48-pin TSSOP) Texas Instruments SN74ALVCH16244DGG
U3
1
CLKIN, D/E_INA, D/E_INB, S/E_INA+, S/E_INA-, S/E_INB+, S/E_INBNone None
2) Verify that no shunts are installed across jumpers JU9 and JU10. 3) Verify that a shunt is installed across pins 1 and 2 of jumper JU11 (internal reference mode). 4) Connect the logic analyzer to header J1. Both channel A and channel B data signal are multiplexed on header J1. Control signal A/ B on pin J1-J11 indicates whether data is from channel A (high) or from channel B (low). 5) Connect a 3.3V power supply to the VA and VADUT pads. Connect the ground terminal of this supply to the GND pad. 6) Connect a 2.5V power supply to the VDB and VODUT pads. Connect the ground terminal of this supply to the OGND pad. 7) Turn on both power supplies. 8) With a voltmeter, verify that 1.38V is measured across test point TP1 and GND. If the voltage is not 1.38V, adjust potentiometer R16 until 1.38V is obtained. 9) Connect the clock function generator to the CLKIN SMA connector. 10) Connect the output of the analog signal function generator to the input of the suggested anti-aliasing filters: a) To evaluate differential AC-coupled analog signals, verify that shunts are installed on pins 2 and 3 of jumpers JU1-JU4. Connect the output of the analog anti-aliasing filters to the D/E_INA and D/E_INB SMA connectors. b) To evaluate single-ended AC-coupled analog signals, verify that shunts are installed on pins 1 and 2 of jumpers JU1-JU6. Verify that resistors R5 and R6 are OPEN. Connect the output of the anti-aliasing filters to the S/E_INA+ and S/E_INB+ SMA connectors.
7
SMA PC-mount connectors
11 1
Shunts (JU1-JU11) MAX1193 PC board
Quick Start
* DC power supplies: Digital: 2.5V, 100mA Analog: 3.3V, 200mA * Function generator with low-phase noise and low jitter for clock input (e.g., HP 8662A) * Two function generators for analog signal inputs (e.g., HP 8662A) * Logic analyzer or data-acquisition system (e.g., HP 1673, HP 16500C) * Analog anti-aliasing filters * Digital voltmeter
Required Equipment
Procedures
The MAX1193 EV kit is a fully assembled and tested surface-mount board. Follow the steps below for board operation. Do not turn on power supplies or enable function generators until all connections are completed: 1) Verify that shunts are installed across pins 2 and 3 of jumpers JU7 and JU8 (fully operational, outputs enabled).
Component Suppliers
SUPPLIER AVX Mini-Circuits TDK Texas Instruments PHONE 843-946-0238 718-934-4500 847-803-6100 972-644-5580 FAX 843-626-3123 718-934-7092 847-390-4405 214-480-7800 WEBSITE www.avxcorp.com www.minicircuits.com www.component.tdk.com www.ti.com
Note: Please indicate that you are using the MAX1193 when contacting these component suppliers. 2 _______________________________________________________________________________________
MAX1193 Evaluation Kit
c) To evaluate single-ended DC-coupled analog signals, verify that shunts are installed on pins 1 and 2 of jumpers JU2 and JU3, and no shunts are installed on jumpers JU1, JU4, JU5 and JU6. Remove capacitors C2 and C3 and resistors R2 and R3. Install 0 resistors on the R5 and R6. Connect the outputs of the anti-aliasing filters to the S/E_INA+ and S/E_INB+ SMA connectors. d) To evaluate differential DC-coupled analog signals, verify that shunts are installed on pins 1 and 2 of jumpers JU2 and JU3, and no shunts are installed on jumpers JU1, JU4, JU5, and JU6. Remove capacitors C2 and C3 and resistors R2 and R3. Install 0 resistors on the R5 and R6. Connect the outputs of the anti-aliasing filters to the S/E_INA+/- and S/E_INB+/- SMA connectors. 11) Enable the function generators. Set the clock function generator for an output amplitude of 2.4VP-P (+11.6dBm) and a frequency (fCLK) of 45MHz. Set the analog input signal generators to the desired output test signal amplitudes and frequencies. The two function generators should be phase locked to each other. 12) Channel A data is presented on the falling edge and channel B data is presented on the rising edge of the logic analyzer clock. 13) Enable the logic analyzer, and begin collecting data. Access to the digital outputs is provided through header J1 for channels A and B. The 0.1in 20-pin header easily interfaces with a user-provided logic analyzer or data acquisition system.
Evaluates: MAX1191/MAX1192/MAX1193
Power Supplies
The MAX1193 EV kit requires separate analog and digital power supplies for best performance. A 3.3V power supply is used to power the analog portion of the MAX1193 (VADUT) and the on-board clock-shaping circuit (VA). The MAX1193 analog supply voltage has an operating range of 2.7V to 3.6V. Note that 3.3V must be supplied to the VA pads to meet the minimum supply voltage of the clock-shaping circuit. A separate 2.5V power supply is used to power the digital portion (VODUT and VDB) of the MAX1193 and the buffer/driver (U3); however, it can operate with a supply voltage as low as 1.8V and as high as 3.6V. The digital power-supply voltage must not exceed the analog power-supply voltage.
Clock
An on-board clock-shaping circuit generates a clock signal from an AC sine-wave signal applied to the CLKIN SMA connector. The input signal should not exceed a magnitude of 2.6VP-P (+12.3dBm). The frequency of the signal should not exceed 45MHz for the MAX1193. The frequency of the sinusoidal input signal determines the sampling frequency of the ADC. Differential line receiver U2 processes the input signal to generate the CMOS clock signal. The signal's duty cycle can be adjusted with potentiometer R16. A clock signal with a 50% duty cycle (recommended) can be achieved by adjusting R16 until 1.38V (40% of the analog power supply) is produced across test points TP1 and GND when the analog supply voltage is set to 3.3V. The clock signal is available at the header pin J11, which can be used as a clock source for the logic analyzer. Additionally, the signal pin J1-11 (A/ B) is an image of the clock signal.
Detailed Description
The MAX1193 EV kit is a fully assembled and tested circuit board that contains all the components necessary to evaluate the performance of the MAX1191/MAX1192/ MAX1193 dual 8-bit ADCs. The ADCs provide the digitized data of their two input channels in multiplexed fashion on a single 8-bit bus. The EV kit comes with the MAX1193 installed, which can be evaluated with a maximum clock frequency (fCLK) of 45MHz. The MAX1193 accepts differential or single-ended analog input signals. With the proper board configuration (as specified below), the input signals can be AC- or DC-coupled. The EV kit is based on a four-layer PC board design to optimize the performance of the MAX1193. Separate analog and digital power planes minimize noise coupling between analog and digital signals. For simple operation, the EV kit is specified to have 3.3V and 2.5V power supplies applied to analog and digital power planes, respectively. However, the digital plane can be operated from 1.8V to 3.3V without compromising performance. The logic analyzer's threshold must be adjusted accordingly.
Input Signals
The MAX1193 accepts differential or single-ended, ACDC-coupled analog input signals. The EV kit accepts input signals with full-scale amplitude of less than 1.024V P-P (+4dBm). See Table 1 for proper jumper configuration. Note: When a differential signal is applied to the ADC, the positive and negative input pins of the ADC each receive half of the input signal supplied at SMA connectors D/E_INA and D/E_INB with a DC offset voltage of VADUT/2.
_______________________________________________________________________________________
3
MAX1193 Evaluation Kit Evaluates: MAX1191/MAX1192/MAX1193
Table 1. Single-Ended/Differential, AC-/DC-Coupled Jumper Configuration
JUMPER JU1 JU2 JU5 JU1 JU2 JU5 JU1 JU2 JU1 JU2 JU5 JU3 JU4 JU6 JU3 JU4 JU6 JU3 JU4 SHUNT POSITION 1 and 2 1 and 2 Installed Not installed 1 and 2 Not installed 2 and 3 2 and 3 Not installed 1 and 2 Not installed 1 and 2 1 and 2 Installed 1 and 2 Not installed Not installed 2 and 3 2 and 3 PIN CONNECTION INA- pin connected to COM pin through R11 INA+ pin AC-coupled to SMA connector S/E_INA+ through R12 and C2 INA+ pin assumes the DC offset at the REFP and REFN common INA- pin assumes no DC offset INA+ pin DC-coupled to SMA connector S/E_INA+ through R12 and R5 INA+ pin assumes the DC offset from the analog input source Analog input signal is applied to channel A. Single-ended input, AC-coupled. * R5 opened (default) EV KIT OPERATION
Analog input signal is applied to channel A. Single-ended input, DC-coupled. * R5 shorted (0)) * C2 opened (removed) * R2 opened (removed)
INA- pin connected to low-side of transformer T1 through R11 Analog input signal is applied to channel A. Differential input, AC-coupled. INA+ pin connected to high-side of transformer T1 through R12 INA- pin DC-coupled to SMA connector S/E_INA- through R11 INA+ pin DC-coupled to SMA connector S/E_INA+ through R12 and R5 INA+ pin assumes the DC offset from the analog input source INB+ pin AC-coupled to SMA connector S/E_INB+ through R13 and C3 INB- pin connected to COM pin through R14 INB+ pin assumes the DC offset at the REFP and REFN common INB+ pin DC-coupled to SMA connector S/E_INB+ through R13 and R6 INB- pin assumes no DC offset INB+ pin assumes the DC offset from the analog input source INB+ pin connected to high side of transformer T1 through R13 Analog input signal is applied to channel A. Differential input, DC-coupled. * R5 shorted (0)) * C2 opened (removed) * R2 opened (removed)
Analog input signal is applied to channel B. Single-ended input, AC-coupled. * R6 opened (default)
Analog input signal is applied to channel B. Single-ended input, DC-coupled. * R6 shorted (0)) * C3 opened (removed) * R3 opened (removed)
Analog input signal is applied to channel B. INB- pin connected to low side of transformer Differential input, AC-coupled. T1 through R14
4
_______________________________________________________________________________________
MAX1193 Evaluation Kit Evaluates: MAX1191/MAX1192/MAX1193
Table 1. Single-Ended/Differential, AC-/DC-Coupled Jumper Configuration (continued)
JUMPER JU3 JU4 JU6 SHUNT POSITION 1 and 2 Not installed Not installed PIN CONNECTION INB+ pin DC-coupled to SMA connector S/E_INB+ through R13 and R6 INB- pin DC-coupled to SMA connector S/E_INB- through R14 INB+ pin assumes the DC offset from the analog input source EV KIT OPERATION Analog input signal is applied to channel B. Differential input, DC-coupled. * R6 shorted (0) * C3 opened (removed) * R3 opened (removed)
Table 2. Power-Down/Standby/Idle/Operating Mode Configurations
JUMPER JU7 JU8 JU7 JU8 JU7 JU8 JU7 JU8 SHUNT POSITION 1 and 2 1 and 2 1 and 2 2 and 3 2 and 3 1 and 2 2 and 3 2 and 3 PIN CONNECTION PD0 connected to OGND PD1 connected to OGND PD0 connected to OGND PD1 connected to VODUT PD0 connected to VODUT PD1 connected to OGND PD0 connected to VODUT PD1 connected to VODUT PD0, PD1 pads connected to external control source (TTL/CMOS compatible) EV KIT OPERATION MAX1193 in power-down mode--ADC off, Ref off, output Three-stated MAX1193 in standby mode--ADC off, Ref on, output Three-stated MAX1193 in idle mode--ADC on, Ref on, output Three-stated MAX1193 in operating mode--ADC on, Ref on, output enabled PD0, PD1 = 00; power-down mode PD0, PD1 = 01; standby mode PD0, PD1 = 10; idle mode PD0, PD1 = 11; operting mode
JU7, JU8
None
Power-Down/Standby/ Idle/Operating Modes
The MAX1193 EV kit also features jumpers that allow the user to enable or disable certain functions of the data converter. Jumpers JU7 and JU8 control the power-down, standby, idle, and operating modes of the MAX1193 EV kit. See Table 2 for jumper settings.
Table 3. Reference Modes Configuration (Jumper JU11)
SHUNT POSITION 1 and 2 REFIN PIN CONNECTION Connected to VADUT EV KIT OPERATION Internal reference mode. VREF = VREFP - VREFN = 0.512V
Reference Modes
The MAX1193 EV kit provides three modes of operation for the reference: internal reference, buffered external reference, and unbuffered external reference modes. In internal reference mode, the REFIN pad is connected to VADUT. In buffered external reference mode, an external user-provided reference voltage of 1.024V may be connected at the REFIN pad. In unbuffered external reference mode, REFIN is connected to GND, and three external reference voltages should be used to drive REFP, REFN, and COM. Jumper JU11 selects the reference modes of the MAX1193 EV kit. See Table 3 for jumper settings.
2 and 3
Unbuffered external reference mode. Connected to GND REFP, REFN, COM pins driven by external sources Connected to external reference source (1.024V) Buffered external reference mode. VREF = VREFP - VREFN = 0.512V
None
_______________________________________________________________________________________
5
MAX1193 Evaluation Kit Evaluates: MAX1191/MAX1192/MAX1193
Digital Output Format
The MAX1193 features a single 8-bit, multiplex CMOScompatible digital output bus. Channel A is available at the output during A/ B high. Channel B is available at the output during A/ B low. The channel selection signal (A/ B) is an image of the clock that may be used to synchronize the output data. Refer to the MAX1193 data sheet for more information. A driver is used to buffer the ADC's digital outputs. This buffer is able to drive large capacitive loads, which may be present at the logic analyzer connection, without compromising the digital output signals. The outputs of the buffers are connected to header J1 located on the right side of the EV kit, where the user can connect a logic analyzer or data-acquisition system. See Table 4 for channel and bit locations on header J1. All even-number pins on header J1 are connected to OGND.
Table 4. Header J1 Output Bit Location (Multiplexed Output Operation)
CHANNEL A (CLK B (CLK )* )* A/B 1 0 BIT D0 J1-3 A0 J1-3 B0 BIT D1 J1-5 A1 J1-5 B1 BIT D2 J1-7 A2 J1-7 B2 BIT D3 J1-9 A3 J1-9 B3 BIT D4 J1-13 A4 J1-13 B4 BIT D5 J1-15 A5 J1-15 B5 BIT D6 J1-17 A6 J1-17 B6 BIT D7 J1-19 A7 J1-19 B7
*Trigger signal for the logic analyzer.
6
_______________________________________________________________________________________
COM J1 J1-19 J1-20 HEADER 2 X 10
VA COM 25 COM D7 1A1 1Y1 R22 100 1% 13 47 2 C8 0.33F C7 1000pF
R21 100 1% R31 49.9 1%
VA VADUT D6 1A2 1Y2 R33 49.9 1% J1-15 J1-16 R34 49.9 1% J1-13 J1-14 R35 49.9 1% J1-11 R36 49.9 1% J1-9 R37 49.9 1% J1-7 R38 49.9 1% J1-5 R39 49.9 1% J1-3 R40 49.9 1% J1-1 VDB VCC VCC VCC VCC 7 18 31 42 C23 0.1F GND GND 34 VODUT OVDD JU7 23 PD0 GND GND JU8 22 PD1 CLK OGND 11 GND CLK 4 JU10 1 R16 5k 3 2 10 5 VA 3 22 23 C41 0.1F C42 2.2F 10V 12 39 45 19 20 GND GND GND 4Y1 4Y2 4Y3 4Y4 3A3 3A4 4A1 4A2 4A3 4A4 3Y3 3Y4 3A2 33 32 30 VADUT 29 27 26 16 17 35 R30 100 1% 3A2 GND C29 0.1F C30 10F 10V VADUT C24 0.1F C25 0.1F C26 0.1F J1-2 J1-4 J1-6 J1-8 J1-10 J1-12 24 REFIN D5 1A3 1Y3 R24 100 1% 43 1A4 1Y4 6 R25 100 1% 41 2A1 2Y1 8 R26 100 1% 40 2A2 2Y2 9 R27 100 1% 38 2A3 2Y3 11 15 44 5 C9 0.1F S/E_INAR11 24.9 1% 1 INAD4 16 C10 22pF 2 INA+ C11 22pF A/B 17 3 JU1 2 1 2 3 C5 0.1F R12 24.9 1% COM R23 100 1% 14 J1-17 J1-18 46 3
GND 1 2 JU11 3
C27 0.1F
C28 10F 10V
U3 SN74ALVCH16244
R32 49.9 1%
REFIN
6 T1 1
Figure 1. MAX1193 EV Kit Schematic
U1
D3 18 3 JU2 2 1 REFN D2 REFN 26 REFN R29 100 1% 36 3A1 10E 20E 30E 40E GND GND GND 3Y2 14 3Y1 13 1 48 C35 0.1F 25 VADUT 24 4 C37 0.1F VADUT 15 21 28 10 VDD INBC39 0.1F C40 2.2F 10V 9 6 INB+ VDD 8 C16 22pF R14 24.9 1% 7 C17 22pF S/E_INBC38 2.2F 10V R46 SHORT VADUT VDD 1 2 3 JU3 R13 24.9 1% C36 2.2F 10V R45 SHORT 28 JU9 D1 2A4 2Y4 C13 0.33F 27 REFP REFP C15 0.33F C14 1000pF D0 21 C12 1000pF 20 R28 100 1% 37 12 JU5 R7 2k 1% 19
D/E_INA
C1 0.1F
5
4
R1 49.9 1%
MAX1193
S/E_INA+
R5 OPEN
R2 49.9 1%
C2 0.1F
REFN
R10 2k 1%
R9 2k 1%
R8 2k 1%
S/E_INB+
R6 OPEN
JU6
R3 49.9 1%
C3 0.1F
D/E_INB COM C6 1 0.1F 2 JU4 3
C4 0.1F
6 T2 1
5
2
R4 49.9 1%
4
3
R41 OPEN PDO 1 VODUT 3 2 VODUT PD1 1 C34 10F 10V 3 2
VDB
VDB C32 10F 10V
R42 OPEN
OGND
C31 0.1F
R43 OPEN
VODUT
R44 OPEN
VODUT
OGND
C33 0.1F
R15 4.02k 1%
TP1 1 RIN1C21 0.1F VA 4 RIN22 C22 0.1F 3 R18 49.9k 1% R20 4.02k 1% R17 2k 1% CLKIN R19 6.04k 1% VCC 8
VA
U2
ROUT1 7 6 RIN1+ MAX9113 ROUT2 RIN2+ GND 5
CLK 3A2
Evaluates: MAX1191/MAX1192/MAX1193
_______________________________________________________________________________________
C20 1000pF C19 0.1F C18 2.2F 10V
MAX1193 Evaluation Kit
7
MAX1193 Evaluation Kit Evaluates: MAX1191/MAX1192/MAX1193
Figure 2. MAX1193 EV Kit Component Placement Guide--Component Side
8
_______________________________________________________________________________________
MAX1193 Evaluation Kit Evaluates: MAX1191/MAX1192/MAX1193
Figure 3. MAX1193 EV Kit PC Board Layout--Component Side
_______________________________________________________________________________________
9
MAX1193 Evaluation Kit Evaluates: MAX1191/MAX1192/MAX1193
Figure 4. MAX1193 EV Kit PC Board Layout--Ground Plane
10
______________________________________________________________________________________
MAX1193 Evaluation Kit Evaluates: MAX1191/MAX1192/MAX1193
Figure 5. MAX1193 EV Kit PC Board Layout--Power Plane
______________________________________________________________________________________
11
MAX1193 Evaluation Kit Evaluates: MAX1191/MAX1192/MAX1193
Figure 6. MAX1193 EV Kit PC Board Layout--Solder Side
12
______________________________________________________________________________________
MAX1193 Evaluation Kit Evaluates: MAX1191/MAX1192/MAX1193
Figure 7. MAX1193 EV Kit Component Placement Guide--Solder Side
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13 (c) 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

▲Up To Search▲

Price & Availability of MAX1B193EVKIT

	To Download MAX1B193EVKIT Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .